The reduction in the size and the inherent features of semiconductor devices (e.g., a Metal-Oxide-Semiconductor (MOS) device) has enabled continued improvement in speed, performance, density, and cost per unit function of integrated circuits over the past few decades.
To enhance the performance of MOS device, stress may be introduced into the channel region of a MOS transistor to improve carrier mobility. Generally, it is desirable to induce a tensile stress in the channel region of an N-type Metal-Oxide-Semiconductor (NMOS) device in a source-to-drain direction, and to induce a compressive stress in the channel region of a P-type Metal-Oxide-Semiconductor (PMOS) device in a source-to-drain direction.
With the widely use of stresses for improving the performance of the MOS devices, it is important to be able to measure and analyze stresses. Particularly, with new channel materials such as germanium, silicon germanium, III-V compound semiconductors, and the like being more frequently used in three-dimensional (3D) structures, the stress analysis for the 3D structures becomes more important. Conventionally, the stress analysis was performed using Nano-Beam Diffraction (NBD) and micro-Raman microscopy.